Recently, Deccan Herald published the expectations of a minimum of Rs 1,200 crore to be allocated for silicon-based semiconductor fabs and at least Rs 5,000 crore in total for the semiconductor and display incentive scheme in the 2023-24 Union Budget out of the total Rs 76,000 crore outlay. A closer look at the Union Budget presented on February 1 shows that the estimates were not too off.
As per page 104 of the Budget document, Rs 1,000 crore has been allocated for silicon-based semiconductor fabs, nearly Rs 1,800 crore for other kind of semiconductor fabs as well as chip packaging, and Rs 200 crore for design-linked incentives (DLIs), taking the total to Rs 3,000 crore.
The highest allocation of Rs 1,800 are for schemes to set up compound semiconductors/silicon photonics/sensors fab/discrete semiconductors fab and semiconductor assembly, testing, marking and packaging (ATMP)/outsourced semiconductor assembly and test (OSAT) facilities in India. The ATMP usually refers to a captive packaging facility catering to only one chipmaker, whereas the OSAT usually does packaging for multiple clients.
Applications for this scheme opened on January 1, 2022, and closes on January 1, 2025. Quite likely many more relatively smaller companies have already applied for this scheme in addition to the five names that the India Semiconductor Mission (ISM) released in February 2022. In addition, there have been speculations of some bigger investments in the ATMP/OSAT space, such as a $300 million possibility by Tata Electronics and part of a $10 billion possibility from US-based Micron technologies. Putting all these together Rs 1,800 crore being allocated to this category is not surprising.
The DLI scheme is also open for three years since January 2022, and given that the amount of fiscal support that each approved applicant will be eligible for is likely to be in tens of crores, an allocation of Rs 200 crore is explainable.
It is interesting that almost no money has been allocated for display fabs, which could mean that neither of the applicants — Vedanta or ELEST — has so far been approved by ISM. Note that similar to the silicon fab incentive scheme, as per section nine of the detailed guideline, the fiscal support for display fabs is also on a pari-passu basis, which should ideally mean starting with the initial phase of construction itself.
Given that a major modification was made in September by removing the ceiling of Rs 12,000 crore fiscal support per applicant while the scheme was closed for new applicants on February 2022, the display fab scheme may invite legal scrutiny similar to what happened with the 2G spectrum licenses.
Perhaps the best way forward for the government may be to scrap the first-round application process, reopen the scheme for a longer period, but with clear timelines to take a decision on each application — something like four to six months from the day of application will be ideal.
That leaves us with what to make out of the Rs 1,000 crore allocated for silicon-based semiconductor fabs. Out of the three applications received, the Vedanta-Foxconn joint venture has been questioned as neither of the companies have any experience in running semiconductor fabs of the kind they have applied for in India. Attempts to get technology from a research organisation like Interuniversity Microelectronics Centre (IMEC) also may not help as the policy demands production-grade licensed technology — ideally that should mean a ‘copy and paste’ from a fab that is or has run it in high volume with high yield.
Proposal from Singapore-based IGSS has so far lacked information in public domain on exactly where they are getting the production-grade technology license from, and even as late as October were looking for an Indian partner. Mumbai-based ISMC, the third applicant clearly has a strong point in having Tower Semiconductor as its technology provider. However, the ISM has most likely decided to wait and see whether Intel will formally approve the technology transfer agreement after its acquisition of Tower Semiconductor which “might be postponed to as late as June, because of delay by the Chinese regulator”.
It is then likely that decisions on these applications may not happen until the second half of this year. Even if the approvals were to happen, arguably only about 5 percent of the project cost may need to be allocated for FY24 — and hence the Rs 1,000 crore allocation.
Arun Mampazhy is a semiconductor engineer.
Disclaimer: The views expressed are the author's own. They do not necessarily reflect the views of DH.